Achievement of High Flatness of Large Diameter Silicon Wafer in Double-sided Polishing -optimization of Polishing Conditions Based on Kinematical Analysis-

INTRODUCTION Semiconductor devices require silicon (Si) wafers as the substrates to be manufactured with very high flatness for miniaturizing the design rule. On the other hand, the size of wafer is increasing for raising the number of device chips per a wafer for reduction of the process cost. Recently, 300 mm diameter wafers are mainly manufactured, and the feasibility study for 450 mm diameter wafers has already started [1].